High Margin Multilevel Phase-Change Memory via Pulse Width Programming

ABSTRACT

An electronic device and method of programming for binary and multilevel memory operation. The active material of the device is a phase-change material. The method includes utilization of the pulse duration of electrical pulses as a programming variable to program a phase-change device to two or more memory states that differ in the relative proportion and/or spatial arrangement of crystalline and amorphous phase regions. Pulse width programming, in conjunction with a device electrical contact having a resistivity within a particular range, enables fine control over the crystalline-amorphous phase-change process by facilitating control over the spatial distribution of thermal energy produced by Joule heating. The degree of control over the phase-change process enables reliable multilevel memory operation by providing for reproducible programming of memory states that are well-resolved in both resistance and programming variable.

FIELD OF INVENTION

This invention relates to the programming of variable resistance memorymaterials. More particularly, this invention relates to the programmingof phase-change memory materials for multilevel operation. Mostparticularly, this invention relates to programming reliability ofmultilevel phase-change memory devices and the use of programming pulsewidth at particular currents to provide greater margin in theprogramming current required to achieve the individual states in amultilevel memory device.

BACKGROUND OF THE INVENTION

Variable resistance materials are promising active materials fornext-generation electronic storage and computing devices. The centralfeature of a variable resistance material is its ability to adopt two ormore distinguishable states that differ in electrical resistance. Avariable resistance material can be programmed back and forth betweenthe distinguishable states by providing energy or power. The appliedenergy or power induces an internal chemical, electronic, or physicaltransformation of the material that manifests itself as a persistentchange in the resistance of the material. The different resistancestates can be used as memory states to store or process data.

Phase change materials are a promising class of variable resistancematerials. A phase change material is a material that is capable ofundergoing a transformation, preferably reversible, between two or moredistinct structural states. The distinct structural states may bedistinguished on the basis of, for example, crystal structure, atomicarrangement, order or disorder, fractional crystallinity, relativeproportions of two or more different structural states, or a physical(e.g. electrical, optical, magnetic, mechanical) or chemical property.In a common embodiment, the two or more distinct structural statesinclude differing proportions of crystalline phase regions and amorphousphase regions of the phase change material, where the phase-changematerial is reversibly transformable between the different structuralstates. In the crystalline state, the phase change material has lowerresistivity; while in the amorphous state, it has higher resistivity.Continuous variations in resistivity over a wide range can be achievedthrough control of the relative proportions of crystalline phase regionsand amorphous phase regions in a volume of phase-change material.Reversibility of the transformations between structural states permitsreuse of the material over multiple cycles of operation. In otherembodiments, the two or more distinct structural states may includedifferent proportions of several amorphous phases that differ inconductivity or different proportions of several crystalline phases thatdiffer in conductivity, or combinations of any of the foregoing.

Typically, a variable resistance device is fabricated by placing theactive variable resistance material, such as a phase change material,between two electrodes. Operation of the device is effected by providingan electrical signal between the two electrodes and across the activematerial. In a common application, phase-change materials may be used asthe active material of a memory device, where distinct data values areassociated with the different structural states and each data valuecorresponds to a distinct resistance or resistivity of the phase-changematerial. The different structural states employed in memory operationmay also be referred to herein as memory states or resistance states ofthe phase-change material. Write operations in a phase-change memorydevice, which may also be referred to herein as programming operations,apply electric pulses to the phase-change material to alter itsstructural state to a target state having the resistance associated withthe intended data value. Read operations are performed by providingcurrent or voltage signals across the two electrodes to measure theresistance. The energy of the read signal is sufficiently low to preventdisturbance of the state of the phase-change material.

Presently, most phase-change memory devices are operated in binary mode.In binary mode, the memory is operated between two structural states. Toimprove read margin and minimize read error, the two structural statesfor binary operation are normally selected to maximize the resistancecontrast between the states. The range of resistance values of aphase-change material is bounded by a set state having a set resistanceand a reset state having a reset resistance. The set state is a lowresistance structural state whose electrical properties are controlledprimarily by the more conductive (e.g. crystalline) portion of thephase-change material and the reset state is a high resistancestructural state whose electrical properties are controlled primarily bythe more resistive (e.g. amorphous) portion of the phase-changematerial. The set state and reset state are most commonly employed inbinary operation and may be associated with the conventional binary “0”and “1” states.

In order to expand the commercial opportunities for phase-change memory,it is desirable to identify new phase-change compositions, devicestructures, and methods of programming that lead to improvedperformance. A key performance metric for memory devices is storagedensity, which is a measure of the amount of information that can bestored per unit area of memory material. Miniaturization is the mostcommon strategy for increasing storage density. By shrinking the arearequired to store a bit of information, more bits can be stored in amemory chip of a given size. Miniaturization has been a successfulstrategy for increasing storage density over the past few decades, butis becoming increasingly more difficult to employ as fundamental sizelimits of manufacturability are reached.

An alternative approach for increasing storage density is to increasethe number of bits stored in a given area of memory. Instead of reducingthe area in which information is stored, more bits of information arestored in a particular area of memory. In conventional binary operation,only a single bit of information is stored in each memory location.Higher storage density can be achieved by increasing storage capacity ofeach memory location. If two bits, for example, can be stored at eachmemory location, the storage capacity doubles without miniaturizing thememory location. In order to increase the storage capacity of eachmemory location, it is necessary for the memory material to be operableover more than the two states used in binary (single bit) operation.Two-bit operation, for example, requires a material that is operableover four distinguishable memory states.

Phase-change memory materials have the potential to provide multiple bitoperation because of the wide resistance range that separates the setand reset states. In a typical phase-change memory device, theresistance of the set state is on the order of ˜1-10 kΩ, while theresistance of the reset state is on the order of ˜100-1000 kΩ. Since thestructural states of a phase-change material are essentiallycontinuously variable over the range of proportions of crystalline andamorphous phase volume fractions extending from the set state to thereset state, multiple bit memory operation at memory states havingresistances intermediate between the set resistance and reset resistanceis possible.

Although phase-change memory offers the potential for multiple bitoperation, progress toward achieving a practical multilevel phase-changememory has been limited. One of the practical complications associatedwith multilevel phase-change operation is achieving adequate resolutionof the different memory states with respect to a programming variable.Another practical complication is a need to achieve reproducibleprogramming to targeted memory states. Reproducibility poses aparticular challenge in the face of the normal variations in theprogramming conditions that accompany memory operation.

As phase-change memory is currently envisioned, different memory statesare programmed by varying the applied current. In order to achievemultilevel operation, it is desirable for the resistance of programmedmemory states to be an appropriately sensitive function of programmingcurrent. If the programmed resistance is relatively insensitive toprogramming current, poor resolution of the programmed resistance occursand the range of resistances available for memory states is compressed.If the programmed resistance is too sensitive to programming current, alarge change in resistance occurs over a narrow range of current. Inthis situation, poor resolution of the programming current results assmall fluctuations in programming current lead to large changes inresistance and it becomes difficult to unambiguously program memorystates having intermediate resistance values.

By focusing on binary operation, the prior art has not paid adequateattention to the need to properly control the sensitivity of programmedresistance with programming conditions to achieve multilevel operation.In order to advance the commercial potential of phase-change memory, itis necessary to develop phase-change materials, device structures ormethods of operating phase-change memory devices that provide adequatecontrol over the sensitivity of programmed resistance to programmingconditions to enable multilevel operation.

SUMMARY OF THE INVENTION

This invention provides a device and method of programming to achievemultilevel operation of a variable resistance memory material. Thedevice includes a variable resistance memory material in electricallycommunication with two or more electrodes, where the device includes anelectrode configured to enable controlled dissipation of electricalcurrent or Joule heat in directions lateral to the principle directionof current flow. Controlled lateral dissipation of electrical or thermalenergy enables a controlled transformation of the variable resistancematerial from one structural state to another and provides control overthe sensitivity of programmed resistance to programming conditions sothat multiple memory states that are well-resolved with respect to bothprogrammed resistance and programming variables can be reliablyprogrammed.

In one embodiment, the variable resistance material is a phase-changematerial that transforms between a crystalline phase, an amorphousphase, and mixed crystalline-amorphous phases where the resistance ofthe phase-change material depends on the relative proportions andspatial arrangement of crystalline and amorphous phase regions. In thisembodiment, the device provides enough lateral current flow or lateralthermal dissipation to permit precise control over the spatialtemperature profile within the phase-change material or at the interfaceof the phase-change material with an electrode. Through precise controlof the temperature profile, especially with respect to thecrystallization and/or melting temperature of the phase-change material,the sensitivity of the programmed resistance to programming conditionscan be controlled well enough to enable reproducible multileveloperation.

In embodiment, control over lateral transport of electrical or thermalenergy in the device is achieved by tailoring the resistivity of one ormore electrical contacts. In one embodiment, the resistivity of anelectrical contact is between 1 and 100 mΩ-cm. In another embodiment,the resistivity of an electrical contact is between 1 and 20 mΩ-cm. Instill another embodiment, the resistivity of an electrical contact isbetween 2 and 10 mΩ-cm. In a further embodiment, the resistivity of anelectrical contact is between 3 and 7 mΩ-cm.

The invention further includes a method of programming a phase-changedevice to control the sensitivity of programmed resistance toprogramming conditions. The method includes controlling the resistivityof the programmed state by varying the duration of the electrical pulsesused to program the device. In one embodiment, programming to differentresistance states occurs by fixing the amplitude of the programmingpulse and varying its duration. Variations in pulse duration permit muchfiner control over the crystalline-amorphous structural transformationthan variations in pulse amplitude and enable reproducibletransformations to structural states separated by smaller increments incrystalline or amorphous phase volume fraction. As a result, the numberof practical programming states is increased and multilevel cellperformance is achieved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an illustrative Resistance vs. Energy/Current plot for aphase-change material.

FIG. 2 depicts an assignment of resistance values to memory states of amultilevel memory device.

FIG. 3 illustrates the sensitivity of the resistance of a phase-changematerial to programming variable in a typical prior art device.

FIG. 4 illustrates a resistance response curve having a sensitivity toprogramming parameter that better facilitates multilevel operation.

FIG. 5 depicts a phase-change memory device having an electrode with lowlateral resistivity.

FIG. 6 shows the variation of the resistance of the device depicted inFIG. 5 as a function of pulse width at different reset amplitudes.

FIG. 7 depicts a phase-change memory device having an electrode withhigh lateral resistivity.

FIG. 8 shows the variation of the resistance of the device depicted inFIG. 7 as a function of pulse width at different reset amplitudes.

FIG. 9 depicts a phase-change memory device having an electrode withintermediate lateral resistivity.

FIG. 10 shows the variation of the resistance of the device depicted inFIG. 9 as a function of pulse width at different reset amplitudes.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Although this invention will be described in terms of certain preferredembodiments, other embodiments that are apparent to those of ordinaryskill in the art, including embodiments that do not provide all of thebenefits and features set forth herein, are also within the scope ofthis invention. Accordingly, the scope of the invention is defined onlyby reference to the appended claims.

This invention is directed at a device and method for achievingmultilevel programming capability in a variable resistance memory cell.The invention seeks to enlarge the number of reproducibly accessiblememory states by providing finer control over the mechanism underlyingtransformations between memory states. In one embodiment, the variableresistance material is a phase-change material and the underlyingmechanism of operation is a structural transformation between amorphousand crystalline phases. In this embodiment, the instant inventionprovides finer control over the volume fractions of amorphous andcrystalline phase regions in the phase-change material. Since theresistance of the programmed state is a sensitive function ofcrystalline vs. amorphous phase volume fraction, the instant inventionprovides finer control over the programmed resistance and enables agreater number of memory states within a given resistance interval as aresult.

In order to appreciate the benefits of the instant invention, it ishelpful to review the basic operational characteristics of phase-changememory devices and to discuss issues that complicate the extension ofphase-change memory to multilevel performance. The following discussionfocuses on chalcogenide materials as illustrative phase-changematerials. The basic principles apply equally to other forms ofphase-change or state-change materials, such as pnictides or otherclasses of materials transformable between two or more statesdistinguishable on the basis of structure, a physical property or achemical property.

Chalcogenide phase-change materials may also be referred to herein aschalcogenide memory materials or phase-change memory materials.Chalcogenide memory materials have been discussed in U.S. Pat. Nos.5,166,758; 5,296,716; 5,534,711; 5,536,947; 5,596,522; and 6,087,674;the disclosures of which are hereby incorporated by reference.

An important feature of the operation of chalcogenide-based phase-changememory devices and arrays is the ability of the chalcogenide memorymaterial to undergo a phase transformation between or among two or morestructural states. The chalcogenide memory materials have structuralstates that include a crystalline state, one or morepartially-crystalline states and an amorphous state. The crystallinestate may be a single crystalline state or a polycrystalline state. Theamorphous state may be a glassy state, vitreous state, or other statelacking long range structural order. A partially-crystalline staterefers to a structural state in which a volume of chalcogenide orphase-change material includes an amorphous portion and a crystallineportion. Generally, a plurality of partially-crystalline states existsfor the chalcogenide or phase-change material, where differentpartially-crystalline states may be distinguished on the basis of therelative proportion of amorphous and crystalline regions. Fractionalcrystallinity is one way to characterize the structural states of achalcogenide phase-change material. The fractional crystallinity of thecrystalline state is 100%, the fractional crystallinity of the amorphousstate is 0%, and the fractional crystallinities of thepartially-crystalline states may vary continuously between 0% (theamorphous limit) and 100% (the crystalline limit). Phase-changechalcogenide materials are thus able to transform among a plurality ofstructural states that vary inclusively between fractionalcrystallinities of 0% and 100%.

Transformations among the structural states are induced by providingenergy to the chalcogenide memory material. Energy in various forms caninduce structural transformations of the crystalline and amorphousportions to alter the fractional crystallinity of a chalcogenide memorymaterial. Suitable forms of energy include one or more of electricalenergy, thermal energy, optical energy or other forms of energy (e.g.particle-beam energy) that induce electrical, thermal or optical effectsin a chalcogenide memory material. Continuous and reversible variabilityof the fractional crystallinity is achievable by controlling the energyenvironment of a chalcogenide memory material. A crystalline state canbe transformed to a partially-crystalline or an amorphous state, apartially-crystalline state can be transformed to a crystalline,amorphous or different partially-crystalline state, and an amorphousstate can be transformed to a partially-crystalline or crystalline statethrough proper control of the energy environment of a chalcogenidememory material. Some considerations associated with the use of thermal,electrical and optical energy to induce structural transformations arepresented in the following discussion.

The use of thermal energy to induce structural transformations exploitsthe thermodynamics and kinetics associated with the crystalline toamorphous or amorphous to crystalline phase transitions. An amorphousphase may be formed, for example, from a partially-crystalline orcrystalline state by heating a chalcogenide material above its meltingtemperature and cooling at a rate sufficient to inhibit the formation ofcrystalline phases. A crystalline phase may be formed from an amorphousor partially-crystalline state, for example, by heating a chalcogenidematerial above the crystallization temperature for a sufficient periodof time to effect nucleation and/or growth of crystalline domains. Thecrystallization temperature is below the melting temperature andcorresponds to the minimum temperature at which crystallization mayoccur. The driving force for crystallization is typically thermodynamicin that the free energy of a crystalline or partially-crystalline statein many chalcogenide memory materials is lower than the free energy ofan amorphous state so that the overall energy of a chalcogenide memorymaterial decreases as the fractional crystallinity increases. Formation(nucleation and growth) of a crystalline state or crystalline domainswithin a partially-crystalline or amorphous state is kinetically enabledabove the crystallization temperature, so that heating (even below themelting point) promotes crystallization by providing energy thatfacilitates the rearrangements of atoms needed to form a crystallinephase or domain. The fractional crystallinity of a partially-crystallinestate can be controlled by controlling the temperature or time ofheating or by controlling the temperature or rate of cooling of anamorphous or partially-crystalline state. Through proper control of thepeak temperature, time of heating and rate of cooling, structural statesover the full range of fractional crystallinity can be achieved for thechalcogenide phase-change materials.

The use of electrical energy to induce structural transformations relieson the application of electrical (current or voltage) pulses to achalcogenide memory material. The mechanism of electrically-inducedstructural transformations is based on the Joule heating created byresistance of the material to current flow. Joule heating corresponds toa conversion of electrical energy to thermal energy and leads to anincrease in the temperature of the chalcogenide material. By controllingthe current density, the temperature can be increased to above thecrystallization temperature, between the crystallization temperature andmelting temperature, or above the melting temperature.

The crystalline phase portions of a chalcogenide memory material aresufficiently conductive to permit current densities that provideadequate Joule heating. The amorphous phase portions, however, are muchless conductive and ordinarily would not support current densitiessufficient to heat the material to the crystallization temperature ormelting temperature. It turns out, however, that the amorphous phase ofchalcogenide memory materials can be electrically switched to a highlyconductive “dynamic” state upon application of a voltage greater thanthe threshold voltage. In the dynamic state, an amorphous phase regionof a chalcogenide phase-change material can support a current densitythat is high enough to heat the material to or above the crystallizationor melting temperature through Joule heating. As a result, nucleationand/or growth of a crystalline phase can be induced in an amorphousphase region. (For more information on electrical switching inchalcogenide materials see U.S. Pat. No. 6,967,344 entitled“Multi-Terminal Chalcogenide Switching Devices”.) By controlling themagnitude and/or duration of electrical pulses applied to a chalcogenidephase-change material, it is possible to continuously vary thefractional crystallinity through controlled interconversion of thecrystalline and amorphous phases.

The effect of electrical stimulation on a chalcogenide memory materialis generally depicted in terms of the R-I (resistance-current)relationship of the material. The R-I relationship shows the variationof the programmed electrical resistance of a chalcogenide memorymaterial as a function of the amount of electrical energy provided or asa function of the magnitude of the current or voltage pulse applied to achalcogenide memory material. The R-I response is a convenientrepresentation of the effect of crystalline-amorphous structuraltransformations on electrical resistance. A brief discussion of the R-Icharacteristics of chalcogenide memory materials follows.

A representative depiction of the electrical resistance (Resistance) ofa chalcogenide memory material as a function of electrical energy orcurrent pulse magnitude (Energy/Current) is presented in the resistanceplot shown in FIG. 1. The resistance plot includes two characteristicresponse regimes of a chalcogenide memory material to electrical energy.The regimes are approximately demarcated with the vertical dashed line10 shown in FIG. 1. The regime to the left of the line 10 may bereferred to as the accumulating regime of the memory material. Theaccumulation regime is distinguished by a nearly constant or graduallyvarying electrical resistance with increasing electrical energy thatculminates in an abrupt decrease in resistance at a critical energy(which may be referred to herein as the set energy). The accumulationregime thus extends, in the direction of increasing energy, from theleftmost point 20 of the resistance plot, through a plateau region(generally depicted by 30) corresponding to the range of points overwhich the resistance variation is small or gradual to the set point orstate 40 that follows an abrupt decrease in electrical resistance.Plateau 30 may be horizontal or sloping.

The left side of the resistance plot is referred to as the accumulatingregime because the structural state of the chalcogenide materialcumulatively evolves as energy is applied. More specifically, thefractional crystallinity of the structural state increases with thetotal applied energy so that the material “accumulates” crystallinephase content in this regime. The leftmost point 20 corresponds to thestructural state in the accumulating regime having the lowest fractionalcrystallinity and may be referred to as the reset state. This state maybe fully amorphous or may be primarily amorphous with some degree ofcrystalline content. As energy is added, the chalcogenide materialprogresses among a plurality of partially-crystalline states withincreasing fractional crystallinity along plateau 30 as crystallinephase regions accumulate in the material. Selected accumulation states(structural states in the accumulation region) are marked with squaresin FIG. 1.

Upon accumulation of a sufficient amount of crystalline phase content,the fractional crystallinity of the chalcogenide memory materialincreases sufficiently to effect a setting transformation. The settingtransformation is characterized by a dramatic decrease in electricalresistance and culminates in stabilization of set state 40. Thestructural states in the accumulation regime may be referred to asaccumulation states of the chalcogenide memory material. Structuraltransformations in the accumulating regime are unidirectional in thatthey progress in the direction of increasing applied energy withinplateau region 30 and are reversible only by first driving thechalcogenide material through the set point 40 and the reset point 60,resetting the device. Once the reset state is obtained, lower amplitudecurrent pulses can be applied and the accumulation response of thechalcogenide material can be restored.

The addition of energy to a chalcogenide material in the accumulatingregime is believed to lead to an increase in fractional crystallinitythrough the formation of new crystalline domains, growth of existingcrystalline domains or a combination thereof. It is believed that theelectrical resistance varies only gradually along plateau 30 despite theincrease in fractional crystallinity because the crystalline domainsform or grow in relative isolation of each other so as to prevent theformation of a contiguous crystalline network that spans thechalcogenide material between the two electrodes of the memory device.This type of crystallization may be referred to herein assub-percolation crystallization.

The setting transformation coincides with a percolation event in which acontiguous, interconnected crystalline network forms within thechalcogenide material, where the network bridges the space between thetwo electrodes of the device. Such a network may form, for example, whencrystalline domains increase sufficiently in size to impinge uponneighboring domains. Since the crystalline phase of chalcogenidematerials is more conductive than the amorphous phase, the percolationevent corresponds to the formation of a contiguous conductive pathwaythrough the chalcogenide material. As a result, the percolation event ismarked by a dramatic decrease in the resistance of the chalcogenidematerial, where the resistance of the material following the percolationevent depends on the effective area of the percolation path. Theleftmost point 20 of the accumulation regime may be an amorphous stateor a partially-crystalline state lacking a contiguous crystallinenetwork. Sub-percolation crystallization commences with an initialamorphous or partially-crystalline state and progresses through aplurality of partially-crystalline states having increasingly higherfractional crystallinities until the percolation threshold is reachedand the setting transformation occurs.

The regime to the right of the line 10 of FIG. 1 may be referred to asthe direct overwrite regime. The direct overwrite regime extends fromset state 40 through a plurality of intermediate states (generallydepicted by 50) to a reset point or state 60. The various points in thedirect overwrite regime may be referred to as direct overwrite states ofthe chalcogenide memory material. Selected direct overwrite states aremarked with circles in FIG. 1. Structural transformations in the directoverwrite regime may be induced by applying an electric current orvoltage pulse to a chalcogenide material. In FIG. 1, an electric currentpulse is indicated. In the direct overwrite regime, the resistance ofthe chalcogenide memory material varies with the magnitude of theapplied electric pulse. The resistance of a particular direct overwritestate is characteristic of the structural state of the chalcogenidememory material, and the structural state is dictated by the magnitudeof the applied current pulse. The fractional crystallinity of thechalcogenide memory material decreases as the magnitude of the currentpulse increases. The fractional crystallinity is highest for directoverwrite states at or near set point 40 and progressively decreases asreset state 60 is approached. The chalcogenide memory materialtransforms from a structural state possessing a contiguous crystallinenetwork at set state 40 to a structural state that is amorphous orsubstantially amorphous or partially-crystalline without a contiguouscrystalline network at reset state 60. The application of current pulseshaving increasing magnitude has the effect of converting portions of thecrystalline network into an amorphous phase and ultimately leads to adisruption or interruption of contiguous high-conductivity crystallinepathways in the chalcogenide memory material. As a result, theresistance of the chalcogenide memory material increases with increasingapplied current in the direct overwrite region.

In contrast to the accumulating region, structural transformations inthe direct overwrite region are reversible and bi-directional. Asindicated hereinabove, each state in the direct overwrite region may beidentified by its resistance and an associated current pulse magnitude,where application of the associated current pulse magnitude induceschanges in fractional crystallinity that produce the particularresistance state. Application of a subsequent current pulse may increaseor decrease the fractional crystallinity of an existing resistance stateof the chalcogenide memory material. If the subsequent current pulse hasa higher magnitude than the pulse used to establish the existing state,the fractional crystallinity of the chalcogenide memory materialdecreases and the structural state is transformed from the existingstate in the direction of the reset state along the direct overwriteresistance curve. Similarly, if the subsequent current pulse has a lowermagnitude than the pulse used to establish the existing state, thefractional crystallinity of the chalcogenide memory material increasesand the structural state is transformed from the existing state in thedirection of the set state along the direct overwrite resistance curve.

The direct overwrite states of the chalcogenide memory material may beused to define memory states of a memory device. Most commonly, thememory devices are binary memory devices that utilize two of the directoverwrite states as memory states, where a distinct data value (e.g. “0”or “1”) is associated with each state. Each binary memory statecorresponds to a distinct structural state of the chalcogenide material.Readout or identification of the state can be accomplished by measuringthe resistance of the material (or device) since each structural stateis characterized by a distinct resistance value. The operation oftransforming a chalcogenide memory material to the structural stateassociated with a particular memory state may be referred to herein asprogramming the chalcogenide memory material, writing to thechalcogenide memory material or storing information in the chalcogenidememory material. The resistance of the memory state established byprogramming the chalcogenide memory material may also be referred toherein as the programmed resistivity of the material or programmedresistance of the device.

To facilitate readout and minimize reading errors, it is desirable toselect the memory states of a binary memory device so that the contrastin resistance of the two states is large. Typically the set state (or astate near the set state) and the reset state (or a state near the resetstate) are selected as memory states in a binary memory application. Theresistance contrast depends on details such as the chemical compositionof the chalcogenide, the thickness of the chalcogenide material in thedevice and the geometry of the device. For a layer of phase-changematerial having the composition Ge₂₂Sb₂₂Te₅₆, a thickness of ˜600 Å, andpore diameter of below ˜0.1 μm in a typical two-terminal devicegeometry, for example, the resistance of the reset state is ˜100-1000 kΩand the resistance of the set state is under ˜10 kΩ. Phase-changedevices in general show resistances in the range of ˜100 kΩ to ˜1000 kΩin the reset state and resistance of ˜0.5 kΩ to ˜50 kΩ in the set state.In the preferred phase-change devices, the resistance of the reset stateis at least a factor of two, and more typically an order of magnitude ormore, greater than the resistance of the set state.

This invention seeks to extend the applicability of chalcogenide memorymaterials beyond binary (single bit) memory applications to multilevel(non-binary or multiple bit) memory applications. The storage density ofa multilevel chalcogenide memory device improves as the number of memorystates increases. As described hereinabove, the direct overwrite regionof the resistance plot of a chalcogenide or phase-change materialincludes a plurality of states that differ in resistance over aresistance interval extending from the set state to the reset state.Multilevel memory operation can be achieved by selecting three or morestates from among the direct overwrite states and associating a uniquedata value with each. Each of the three or more states corresponds to adistinct structural state of the chalcogenide and is characterized by adistinct resistance value. Two bit operation can be achieved byselecting four direct overwrite states to serve as memory states, threebit operation can be achieved by selecting eight direct overwrite statesto serve as memory states, etc. FIG. 2 shows an illustrative selectionof eight direct overwrite states for use as memory states in a three-bitmemory device. One assignment of data values to the different states isalso shown, where the (000) state corresponds to the set state, the(111) state corresponds to the reset state, and a series of intermediateresistance states is included.

To improve the storage density in a multilevel memory device, it isdesirable to operate the memory material over as many states aspossible. The number of memory states is controlled by the resistanceinterval between the set state and reset state, the resolution limit ofthe resistance measurement performed during the read operation, thestability of the resistance values, and the sensitivity of programmedresistance to programming conditions. A large resistance differencebetween the set and reset states provides a wide dynamic range ofresistance over which operation of the memory device can occur. Theresolution limit of the read resistance measurement imposes a practicallimit on the spacing of resistance values associated with the differentmemory states. The resolution limit depends on read noise and readcircuit limitations. The resistance differential between adjacent memorystates must be greater than the resolution of the read resistancemeasurement. Stable resistance values are needed to insure thatprogrammed resistance values do not vary (drift) in time.

This invention is concerned with the sensitivity of programmedresistance to programming conditions. This sensitivity is an importantconsideration for multilevel operation because it determines theresolution required in the programming conditions. As indicatedhereinabove, multilevel programming requires an adequate difference inresistance between consecutive memory states so that the individualstates can be unambiguously resolved in a read operation. Adequateresistance contrast between consecutive memory states is not, however,sufficient by itself to enable practical multiple bit memory operation.It is further necessary that the programming conditions required toachieve the different resistance states are adequately resolved. As usedherein, programming conditions refer to parameters such as theamplitude, duration, or shape of the energetic waveforms used to programthe memory material. For electrical programming, programming conditionscorresponds to parameters such as current pulse amplitude, current pulseduration, voltage pulse amplitude, voltage pulse duration, rise time (orshape of leading edge) of a voltage or current pulse, and fall time (orshape of trailing edge) of a voltage or current pulse.

The significance of the sensitivity of the resistance of a chalcogenidememory material to programming conditions is illustrated in FIG. 3. FIG.3 depicts the resistance of a three-bit memory device as a function of aprogramming parameter, where the sensitivity of resistance to theprogramming parameter is similar to that shown in FIG. 2. The eightmemory states in FIG. 3 are depicted as filled circles and are labeledaccording to the resistance of the memory state and the value of theprogramming parameter required to establish the memory state. (Forexample, R₁ denotes the resistance of memory state 1 and P₁ denotes thevalue of the programming parameter required to establish memory state1.)

Additional lines are included in FIG. 3 to illustrate the sensitivity ofprogrammed resistance to programming conditions. The dashed (- - - -)lines mark the resistance of each memory state and the dot-dash (- . -. - .) lines mark the value of the programming parameter of each memorystate. The resistance plot of FIG. 3 shows good resolution of theresistance of the eight memory states. The resistance of each memorystate is well-resolved from the resistance of adjacent memory states.The resolution in programming parameter, however, is poor for several ofthe memory states. In particular, programming parameters P₄, P₅, P₆, andP₇ for memory states 4, 5, 6, and 7 are bunched and difficult toresolve.

The poor resolution in programming parameter is a consequence of thehigh sensitivity of resistance to programming parameter. The highsensitivity is a reflection of the steep slope of the resistance plot inthe region of intermediate memory states between state 1 (which may havethe resistance of the set state) and state 8 (which may have theresistance of the fully reset state). Because of the high sensitivity, asmall fluctuation or deviation in the value of the programming parameterproduces a significant variation in resistance. As a result, highsensitivity of resistance to programming parameter makes it difficult tostabilize intermediate resistance states with any degree of reliability.

In FIG. 3, for example, memory states 6 and 7 are well resolved inresistance, but have essentially the same value of the programmingparameter because of the nearly vertical shape of the resistance plot inthe vicinity of states 6 and 7. As a second example, one wishing toprogram memory state 5 in FIG. 3 needs to apply programming parameter P₅to the memory device. A small variation in the intended programmingparameter P₅, however, may lead to an actual value of the programmingparameter that is closer to P₄ or P₆ and thus may result in a devicehaving a resistance closer to R₄ or R₆ when the device is read. As aresult, an error occurs on reading.

The sensitivity of the programmed resistance of a memory state of aphase-change device to programming parameter is ultimately determined bythe programmer's ability to control the characteristics of thecrystalline-amorphous phase transition. Since the resistivity of thecrystalline phase is significantly lower than the resistivity of theamorphous phase, the relative proportions of the crystalline andamorphous phase regions in the phase-change material of the memorydevice influence the resistance of a programmed state. In addition tothe relative amounts, the spatial arrangement of crystalline andamorphous phase regions influences the programmed resistance. Lowprogrammed resistance is promoted by an arrangement of crystalline phaseregions that extends contiguously between the two contacts of thedevice. For a given crystalline phase volume fraction within thephase-change material, a contiguous arrangement of crystalline phaseregions leads to a lower resistance than a non-contiguous arrangement.

If the crystalline phase regions are arranged non-contiguously, thespace between crystalline phase regions is occupied by phase-changematerial in the amorphous phase. As a result, current through the devicemust pass at least partially through high resistance amorphous phaseregions that are in series with the non-contiguous crystalline phaseregions and the overall resistance of the programmed state increases. Ina non-contiguous arrangement of crystalline and amorphous regions havinga particular crystalline volume fraction, the spatial arrangement ofcrystalline regions and amorphous regions also influences theresistance. At a given crystalline volume fraction, the arrangement ofcrystalline domains that minimizes the size of the gaps between theamorphous phase regions promotes establishment of a low resistancestate. As the presence of amorphous phase regions in the pathway forcurrent flow between device electrodes increases, the resistance of theprogrammed state increases (and vice versa).

The number and cross-section of contiguous crystalline pathways forcurrent flow through the phase-change material also influence theresistance of a programmed state. An arrangement of crystalline phaseregions that provides for multiple contiguous crystalline pathways thatoccupy a substantial volume of the phase-change material best promotes alow resistance programmed state. In one model, the reset state of aphase-change material may be viewed as a substantially amorphous phasethat lacks contiguous crystalline pathways. Crystalline phase regionsmay be present in the reset state, but they occupy a low volume fractionand are either spatially isolated and disconnected, or are connectedwith very low cross-section pathways (for example, for a cross-sectionalarea of 4E-14 cm², the resistance for a 600 Å path length through apathway with a resistivity of 0.02 Ohm cm is ˜3MΩ, a resistancecomparable to or greater than the resistance through a largercross-section amorphous pathway). As the volume fraction of crystallinephase regions increases and the crystalline phase regions become moreinterconnected, the resistance of the programmed state decreases. Theminimum resistance coincides with the set state, which may be viewed asa state having a high crystalline phase volume fraction and highercross-section, contiguous crystalline pathways. Programmed states havingresistances between the set resistance and reset resistance haveintermediate degrees of crystalline phase volume fraction andconnectivity of crystalline phase domains.

In order to achieve reliable multilevel memory operation, it isnecessary to be able to precisely and reproducibly control thecrystalline phase volume fraction as well as the physical arrangement,connectivity, rate of formation, and spatial dimensions of crystallinephase regions within the phase-change material. Achieving the requisitecontrol is difficult because the resistance of the programmed state is acomplicated function of the characteristics of the crystalline phaseregions. Depending on where crystalline phase regions are formed uponapplication of the programming current, for example, the change inresistance induced by programming may be large or small. Control overthe characteristics of the crystalline phase regions, in turn, is acomplicated function of the programming parameter.

As indicated hereinabove, control over the relative proportions of thecrystalline and amorphous phase regions requires control over thetemperature of the phase-change material relative to the crystallizationand melting temperatures. Crystallization requires establishing atemperature between the crystallization and melting temperatures andmaintaining the temperature for a period of time sufficient to permitformation of a crystalline phase. The material may be heated directly toa temperature between the crystallization temperature and meltingtemperature. Alternatively, the material may be heated to a temperatureabove the melting temperature followed by a slow quench that permits thematerial to reside at a temperature between the crystallization andmelting temperatures for a sufficiently long period of time as thematerial cools down. Formation of amorphous phase regions requiresheating the phase-change material to a temperature above the meltingtemperature followed by a quench that is sufficiently fast to preventcrystallization.

Control over the spatial arrangement of crystalline and amorphous phaseregions requires control over the distribution of thermal energy in thephase-change material. The distribution of thermal energy establishesthe temperature profile of the phase-change material and determines thespatial positions within the material that are heated to below thecrystallization temperature, to a temperature between thecrystallization temperature and the melting temperature, and to abovethe melting temperature. The time variation of the distribution ofthermal energy governs heating and cooling rates.

The degree of control over the distribution of thermal energy within aphase-change material has been inadequate in the prior art to achievethe sensitivity in the variation of resistance as a function ofprogramming parameter desired for a multilevel cell. FIG. 4 illustratesa phase-change response curve that provides a more favorable multilevelbehavior. In contrast to FIG. 3, the resistance of the phase-changedevice varies only gradually as the programming parameter increases. Theflatter response curve extends the range in programming parameter overwhich the resistance changes and permits greater spacing of memorystates with respect to programming parameter. As a result, the memorydevice is more tolerant of fluctuations in programming parameter and itbecomes easier to unambiguously define multiple memory states for thedevice. This remains the case even though some compression in resistancemay occur in the low resistance regime of the response curve because ofthe high degree of resolution available for resistance measurements.

Achievement of a flattened response curve requires fine control over theamount and spatial distribution of thermal energy in the phase-changematerial, which in turn requires fine control over the conversion ofelectrical energy into thermal energy through Joule heating. In theprior art, it has been difficult to control the flow of electric currentto deliver the spatial distribution of thermal energy needed tostabilize the spatial arrangement and volume fraction of amorphous andcrystalline phases required to achieve each of several intermediateresistance states with sufficient precision. In the prior art, thetendency has been for the relative proportions of crystalline andamorphous phase regions to change abruptly to produce a large change inresistance over a narrow range of programming parameter. The instantinventors believe that the abrupt change in volume fraction observed inthe prior art is due to an inability to properly control the productionand dissipation of thermal energy produced by the electric current inJoule heating.

The instant invention provides a method and device structure thatenables finer control over the distribution of thermal energy producedby the electric current used to program a phase-change material. Morespecifically, the instant inventors have discovered that the relativeproportions and spatial arrangement of crystalline and amorphous phaseregions in a phase-change material can be more precisely established bycontrolling the dissipation of thermal energy produced by Joule heatingin a device electrode in directions lateral to the direction of currentflow. By regulating the duration of the electrical pulse used to programthe phase-change material and fixing the resistivity of a deviceelectrode in a particular range, the instant invention permits controlover the lateral dissipation of thermal energy and the temperatureprofile within the phase-change material. As a result, the volumefraction and spatial configuration of amorphous and crystalline phaseregions can be controlled in a more continuous and less abrupt mannerthan is possible in the prior art. The net result is a resistanceresponse curve for the phase-change device that has better resolvedresistance states and programming levels and thus better suitability formultilevel operation than prior art devices.

One aspect of the instant invention is a programming method utilizingelectrical current pulses whereby the resistance of the programmed stateis controlled by the pulse duration. (Pulse duration may also bereferred to herein as pulse width.) The instant inventors havediscovered that pulse width is an effective programming parameter forachieving multiple well-resolved resistance states when the resistivityof a device electrode is in a preferred range. While not wishing to bebound by theory, the instant inventors believe that the preferredresistivity range corresponds to a range in which lateral dissipation ofthe thermal energy produced by the programming current is tailored topromote a softer resistance response of the device. Illustration andexplanation of the principles that may underlie the benefits provided bythe instant invention are described in the following examples.

EXAMPLE I

In this example, the effect of pulse width on the programmed resistanceof a phase-change device having a lower electrode with low resistivityis described.

FIG. 5 depicts a typical phase-change memory device 100 that includesbase wafer 110, dielectric buffer 120, lower electrode 130, conductiveline 140, dielectric 150, phase-change material 160, dielectric 170,upper electrode 180, and conductive line 190. Conductive lines 140 and190 receive and deliver electrical signals to surrounding circuitry andmay, for example, be a word line and a bit line of a memory device in anarray. In device 100, current is delivered from an external devicethrough conductive line 140 and lower electrode 130 to phase-changematerial 160 and upper electrode 180 and conductive line 190.Phase-change material 160 has the composition Ge₂Sb₂Te₅. The directionof current flow in device 100 is generally vertical between the portionof lower electrode 130 in contact with phase-change material 160 and theportion of upper electrode 180 disposed immediately above such portionof lower electrode 130.

Lower electrode 130 in this example has a resistivity below 1 mΩ-cm. Thelow resistivity of lower electrode 130 leads to efficient flow ofcurrent in all directions through lower electrode 130, including in thegenerally vertical direction of current flow toward upper electrode 180and in directions lateral thereto. Since thermal resistivity generallytracks electrical resistivity, lower electrode 130 also exhibitsefficient lateral dissipation of thermal energy. Lower electrode 130 inthis example is an unannealed form of TiAlN. Materials such as TiW andunannealed forms of other metal nitrides (e.g. TiN, TiSiN) are alsoillustrative of lower electrode materials that distribute thermal energyproduced by Joule heating in accordance with this example.

FIG. 6 shows the effect of pulse width on the resistance of the devicedepicted in FIG. 5. In the experiment, the device was initialized with aset pulse having an amplitude of 2.8 mA and a pulse width of 500 ns. Theinitializing set pulse placed the device in a set state having aresistance of ˜1 kΩ. The device was then cycled with an alternatingseries of reset pulses and set pulses. A common set pulse having theamplitude and duration of the initializing pulse was applied for alltrials. A series of trials utilizing reset pulses of fixed amplitude andvariable duration were performed. For each trial at a particular fixedamplitude, a reset pulse having a particular duration was applied to thedevice and the device resistance was measured. After the resistancemeasurement was completed, a set pulse was applied and subsequentlyanother reset pulse at the particular fixed amplitude having a differentduration was applied. The resistance was measured and the procedure wasrepeated for several cycles over a range of pulse durations. For eachtrial, cycling at fixed pulse amplitude and progressively increasingpulse duration was continued until the device was transformed to itsreset state. The procedure was repeated for a series of fixed resetpulse amplitudes between 2.8 mA and 5.5 mA.

The results of the trials are shown in FIG. 6, which displays a seriesof traces showing the dependence of device resistance on reset pulsewidth. Each trace is depicted with a common symbol and corresponds to atrial at a particular fixed reset amplitude, where the reset amplitudecorresponding to each trace is labeled in the figure and noted in thelegend. The direction of increasing reset pulse amplitude is also notedin FIG. 6. For reference purposes, the set resistance of each cycle ofeach trial at a particular fixed reset pulse amplitude is also shown inFIG. 6.

The general appearance of each trace is similar. For each fixed resetpulse amplitude, the device resistance is at or close to the setresistance at short pulse durations and abruptly increases to aresistance over 100 kΩ at longer pulse durations. When the resetamplitude is fixed at 2.8 mA, for example, the device resistance remainsat ˜1 kΩ up to pulse durations well above 100 μs. As the pulse durationapproaches 1 ms, however, the device resistance exhibits an abrupt,nearly discontinuous increase in resistance to over 100 kΩ. As the resetpulse amplitude increases, the same general characteristics are observedfor the resistance response trace. The notable difference, however, isthat the pulse duration at which the abrupt change in device resistanceoccurs decreases as the amplitude of the reset pulse increases.

As noted above, an abrupt increase in resistance with programmingparameter is undesirable for multilevel memory operation. The results ofthis example show that when the resistivity of a device electrode is toolow, pulse width is an ineffective programming parameter for achievingsatisfactory multilevel memory operation. The instant inventors believethat the rapid lateral dissipation of thermal energy created by Jouleheating prevents the degree of control needed over the distribution ofthermal energy in the phase-change material to reliably establishintermediate resistance states (e.g. states having a resistance between˜2 kΩ and 100 kΩ in this example). The resolution in pulse width neededto distinguish intermediate resistance states in this example is toofine and too susceptible to ambiguities caused by normal fluctuations inprogramming conditions to permit reliable multilevel operation. Thehighly efficient lateral dissipation of thermal energy makes itdifficult to achieve the precise control over the relative proportionsand spatial arrangement of crystalline and amorphous regions needed tostabilize intermediate resistance states. Instead, the prevailingtendency is for the device to adopt only the states (set state and resetstate) at the extremes of the range of resistance potentially availablefor memory operation.

EXAMPLE II

In this example, the effect of pulse width on the programmed resistanceof a phase-change device having a lower electrode with high lateralresistivity is described.

FIG. 7 shows a device structure 200 utilizing a lower electrode having ahigh resistance to lateral flow of electrical or thermal energy. Device200 includes base wafer 205, conductive line 210, lower electrode 215,and dielectric 220 having an opening formed therein. Breakdown layer 225and phase-change material 230 are formed within the opening.Phase-change material 230 is also formed over the opening and ondielectric 220. Device 200 further includes upper electrode 235, metallayers 240 and 250, surrounding dielectric 245, and conductive line 255.Phase-change material 230 has the composition Ge₂Sb₂Te₅ and breakdownlayer 225 is a thin insulating layer (having a thickness of ˜10-30 Å).

In device 200, current is delivered from an external device throughconductive line 210 to lower electrode 215 and continues throughbreakdown layer 225 and phase-change material 230 to upper electrode 235and metal layers 240 and 250. Conductive line 255 receives currentpassing through the device and delivers it to external circuitry. As isknown in the art, the purpose of breakdown layer 225 is to limit thearea of contact of phase-change material 230 with lower electrode 215.Upon fabrication, breakdown layer 225 is insulating and prevents currentflow between lower electrode 215 and upper electrode 235. Duringpost-fabrication conditioning, application of a sufficient voltagebetween lower electrode 215 and upper electrode 235 punctures breakdownlayer 225 to create a conductive pathway that enables current to flow tophase-change material 230.

Lower electrode 215 is a carbon electrode and has been selected toprovide high electrical and thermal resistivity in directions lateral tothe generally vertical direction of current flow. Lower electrode 215 isformed by sputter deposition from a carbon target. In its as-depositedstate, the carbon is amorphous and highly resistive (resistivity ˜100mΩ-cm-˜1Ω-cm). The carbon remains resistive in the as-fabricated stateof the device. Post-fabrication conditioning of the device (whichentails application of voltage pulses between lower electrode 215 andupper electrode 235 to stabilize the performance characteristics of thedevice) reduces the resistivity of carbon. Application of voltage pulsesof a sufficient magnitude across a resistive carbon electrode duringconditioning transforms the electrode to a more conductive state. Thereduced resistivity, however, does not occur universally throughout thecarbon electrode, but rather occurs only over a limited volume of thecarbon electrode. Thermal energy produced by current flow through thecarbon electrode is the driving force for the conversion of resistivecarbon to conductive carbon. As voltage pulses are applied duringconditioning, current preferentially flows along low resistance pathwaysand the resulting thermal energy progressively transforms carbon alongand adjacent to the low resistance pathways to a more conductive state.Eventually, a conductive carbon pathway extends across the full verticaldepth of the carbon electrode in the direction of current flow and acontrolling current pathway is established. The net effect of theconditioning process on a carbon electrode is the establishment of arestricted volume of conductive carbon within a surrounding matrix ofhighly resistive carbon resistivity above 100 mΩ-cm).

Device 200 of this example has been conditioned so that lower electrode215 is conductive only over a limited volume having a cross-sectionalarea that is significantly smaller than the cross-sectional area ofphase-change material 230. In one embodiment, the cross-sectional areaof the conductive carbon region is comparable to the cross-sectionalarea of the punctured region of breakdown layer 225 formed duringconditioning, estimated to be 500-1000 A in diameter. For purposes ofthis example, the important aspect of lower electrode 215 is that thehighly resistive portion of the electrode that surrounds the conductiveportion greatly inhibits lateral dissipation of thermal and electricalenergy. Transport of thermal and electrical energy occurs predominantlyin the direction of current flow. Device 200 of this example thusdiffers fundamentally with respect to the efficiency of lateraldissipation of thermal energy from device 100 of Example I.

The resistance of device 200 as a function of pulse width at variousfixed reset pulse amplitudes was measured in a manner similar to thatdescribed in Example I hereinabove. In the experiment, the device wasinitialized with a set pulse having an amplitude of 1 mA and a pulsewidth of 600 ns. The initializing set pulse placed the device in a setstate having a resistance of slightly less than 1 kΩ. The device wasthen cycled with an alternating series of reset pulses and set pulses. Acommon set pulse having the amplitude and duration of the initializingpulse was applied for all trials. A series of trials utilizing resetpulses of fixed amplitude and variable duration were performed. For eachtrial at a particular fixed amplitude, a reset pulse having a particularduration was applied to the device and the device resistance wasmeasured. After the resistance measurement was completed, a set pulsewas applied and subsequently another reset pulse at the particular fixedamplitude having a different duration was applied. The resistance wasmeasured and the procedure was repeated for several cycles over a rangeof pulse durations. For each trial, cycling at fixed pulse amplitude andprogressively increasing pulse duration was continued up to a maximumpulse duration of several milliseconds. The procedure was repeated for aseries of fixed reset pulse amplitudes between 1.15 mA and 2.6 mA.

FIG. 8 shows the effect of pulse width on the resistance of the devicedepicted in FIG. 7. FIG. 8 presents a series of traces, where each traceis depicted with a common symbol and corresponds to a trial at aparticular fixed reset amplitude that shows the dependence of deviceresistance on reset pulse width. The magnitude of the reset pulseamplitude corresponding to each trace is labeled in the figure and notedin the legend. For reference purposes, the set resistance on cycling atfixed reset pulse parameters is also shown in FIG. 8.

The general appearance of each trace is similar. For each reset pulseamplitude, the device resistance is nearly independent of pulse width.At a reset pulse amplitude of 1.15 mA, for example, the resistance ofthe device remained constant at a few kΩ for pulse durations rangingfrom ˜50 ns up to several milliseconds. As the reset pulse amplitudeincreases, the same general characteristics are observed for theresistance response trace. The notable difference, however, is that thedevice resets to a progressively higher constant resistance as theamplitude of the reset pulse increases. When the reset pulse amplitudeis 2.6 mA, the resistance of the device remains nearly constant at avalue of slightly above 100 kΩ as the pulse width increases.

The results of this example show that when the device electrode exhibitshigh resistivity to lateral dissipation of thermal energy, pulse widthis an ineffective programming parameter for achieving satisfactorymultilevel memory operation. The instant inventors believe that thelateral dissipation of thermal energy created by Joule heating in device200 is too low to achieve the necessary degree of control over thespatial distribution of thermal energy in the phase-change materialthrough variations in pulse width. The lack of lateral thermaldissipation effectively confines current flow and the thermal energy itcreates to the restricted conductive portion of lower electrode 215.Because of the high lateral resistance, the increase in thermal energyproduced by increasing the pulse duration cannot be productivelyharnessed for the purpose of achieving greater control over the spatialtemperature profile within phase-change material 230. The high lateralresistivity, for example, precludes the use of the excess thermal energyobtained at long pulse durations to expand the area of contact betweenlower electrode 215 and phase-change material 230 over which aparticular temperature (e.g. relative to the crystallization or meltingtemperatures of the phase-change material) is maintained. As a result,the ability to control the temperature profile within the phase-changematerial in directions lateral to the direction of current flow iscompromised and pulse width becomes an insufficiently sensitiveprogramming variable for achieving multilevel operation.

EXAMPLE III

In this example, the effect of programming pulse width on the resistanceof a device in accordance with the instant invention is described. Thedevice is shown as device 300 in FIG. 9. Device 300 includes base wafer310, lower electrode 320, phase-change material 340 positioned within anopening of surrounding dielectric 330, and upper electrode 350.Phase-change material 340 is Ge₂Sb₂Te₅. In device 300, current isdelivered from an external device through a conductive line connected tolower electrode 320 and continues through phase-change material 340 toupper electrode 350.

Lower electrode 320 is an intermediate resistivity form of TiAlNobtained by annealing TiAlN at 400° C. The resistivity of the annealedelectrode material is ˜3-6 mΩ-cm. Other electrode materials (e.g. TiSiN,TiW, TiN, MoN, nitrogenated carbon) provide a resistivity in a rangeproviding the benefits of the instant invention if annealed to atemperature appropriate for the material. The resistivity of lowerelectrode 320 is generally isotropic and provides for a lateralresistance to the dissipation of thermal energy that is intermediatebetween lower electrode 130 of Example 1 and lower electrode 215 ofExample 2. The intermediate lateral resistance of lower electrode 320permits an intermediate degree of lateral dissipation of thermal energyand an intermediate degree of current flow in lateral directions. Asdescribed more fully hereinbelow, the intermediate degrees of lateralthermal dissipation and current flow enable a mechanism by which thedistribution of thermal energy within the phase-change material can becontrolled. Through this mechanism, the instant invention providessufficient control over the relative proportions and spatial arrangementof crystalline and amorphous regions within the phase-change material.

FIG. 10 shows the effect of pulse width on the resistance of the devicedepicted in FIG. 9. In the experiment, the device was initialized with aset pulse having an amplitude of 0.2 mA and a pulse width of 500 ns. Theinitializing set pulse placed the device in a set state having aresistance of slightly above 10 kΩ. The device was then cycled with analternating series of reset pulses and set pulses. A common set pulsehaving the amplitude and duration of the initializing pulse was appliedfor all trials. A series of trials utilizing reset pulses of fixedamplitude and variable duration were performed. For each trial at aparticular fixed amplitude, a reset pulse having a particular durationwas applied to the device and the device resistance was measured. Afterthe resistance measurement was completed, a set pulse was applied andsubsequently another reset pulse at the particular fixed amplitudehaving a different duration was applied. The resistance was measured andthe procedure was repeated for several cycles over a range of pulsedurations. For each trial, cycling at fixed pulse amplitude andprogressively increasing pulse duration was continued until the pulseduration was at least 200 ns. The procedure was repeated for a series offixed reset pulse amplitudes between 0.43 mA and 0.62 mA.

The results of the trials are shown in FIG. 10, which displays a seriesof traces showing the dependence of device resistance on reset pulsewidth. Each trace is depicted with a common symbol and corresponds to atrial at a particular fixed reset amplitude, where the reset amplitudecorresponding to each trace is labeled in the figure and noted in thelegend. For reference purposes, the set resistance at different pulsewidths is also shown in FIG. 10.

The data shown in FIG. 10 indicate that the variation of deviceresistance with pulse width depends on reset amplitude. When the resetamplitude is 0.43 mA, the device resistance increases gradually withincreasing pulse width. The gradual variation in device resistance withpulse width extends the operable range of pulse width associated withthe range of resistance states available in the phase-change material.The wider operable range of pulse width provides greater certainty andreproducibility in the programming of intermediate resistance states andthus facilitates multilevel operation. The gradual resistance responsecurve observed at a reset amplitude of 0.43 mA has the desirablecharacteristics discussed in connection with FIG. 4 hereinabove.Multiple memory states that are well-resolved in both resistance andpulse width can readily be defined for the resistance response curveobserved at 0.43 mA. As a result, reliable multilevel operation withhigh margins and a high degree of tolerance for typical fluctuations inthe programming and read processes can be readily achieved.

As the reset amplitude increases above 0.43 mA in this example, theshape of the resistance response curve of the device evolves toward thesteeper response observed in the prior art. The resistance response at areset amplitude of 0.49 mA maintains characteristics favorable tomultilevel operation, but suitability for multilevel operationdiminishes at reset amplitudes of 0.55 mA and 0.62 mA as the steepnessof the response curve increases. The steeper response curve compressesthe operable interval of pulse widths and introduces the difficulties inachieving reliable multilevel operation described hereinabove inconnection with FIG. 3.

The controlled, less abrupt increase in device resistance observed inthis example at reset amplitudes of 0.43 mA and 0.49 mA is believed toresult from more precise control over the distribution of thermal energyin the phase-change material. The intermediate lateral resistivity oflower electrode 320 allows for enough lateral dissipation of thermalenergy and/or lateral current flow to enable programming pulse width toinfluence the distribution of thermal energy in the phase-changematerial to an extent sufficient to provide a reliable and incrementaldegree of control over the relative amounts and/or spatial configurationof amorphous and crystalline phase regions in phase-change material 340.

At the higher reset amplitudes of this example, it is believed that theamount of thermal energy produced by Joule heating overwhelms theability of lower electrode 320 to effectively manage the distribution ofthermal energy. As described more fully hereinbelow, the desired degreeof control over the structural characteristics of the phase-changematerial requires a spatial differentiation of temperatures with respectto the crystallization and melting temperatures of the phase-changematerial over the cross-sectional dimension of the area of contact ofthe lower electrode with the phase-change material. To achieve finecontrol over the structural characteristics, it is desirable to have theability to establish a temperature profile over the cross-section of thephase-change material in which different regions are selectively heatedto temperatures below the crystallization temperature, temperaturesbetween the crystallization temperature and melting temperature, and/ortemperatures above the melting temperature. Spatial differentiation ofthe temperature profile with respect to the crystallization and meltingtemperatures enhances control over the programming process.

At the high reset amplitudes of this example, it is possible that thecurrent density entering phase-change material 340 is sufficiently highover a sufficiently extended lateral area relative to the area ofcontact of phase-change material 340 with lower electrode 320 topreclude differential control over the temperature profile ofphase-change material 340. The high reset currents may lead to greateruniformity and less differentiation of the temperature profile over thearea of contact. The higher current density resulting from higher resetamplitude may simply extend the lateral distance over which control ofthe structural characteristics of phase-change material 340 would occurto a position beyond the dimensions of the opening in dielectricmaterial 330 in which phase-change material 340 resides so that thethermal and electric environment across the lateral dimensions ofphase-change material 340 are sufficiently uniform to yield a resultanalogous to that described in Example 1 hereinabove. In this view, thehigher reset amplitudes of this example may produce more gradualresistance response curves in larger diameter devices.

The results of this example show that the sensitivity of the resistanceresponse curve of a phase-change device can be controlled with aprogramming parameter. In particular, use of reset pulse width as aprogramming variable has been demonstrated to soften the resistanceresponse curve to achieve a more controlled evolution of deviceresistance.

In the device of Example 1, the lateral resistivity of lower electrode130 was too low to permit the degree of control over the distribution ofthermal energy demonstrated in this example. The low lateral resistivityof lower electrode 130 leads to rapid lateral dissipation of thermalenergy and rapid attainment of a uniform, thermally equilibratedinterface of lower electrode 130 with phase-change material 160. The lowlateral resistivity of lower electrode 130 further leads to a rapidequilibration of electrical current within lower electrode 130 so thatthe current density passing through phase-change material 160 is nearlyuniform over a horizontal cross-section of phase-change material 160. Asa result, it is difficult to achieve a differentiation in the relativeproportions of crystalline and amorphous phases in directions lateral tocurrent flow.

In the device of Example 2, the lateral resistivity of lower electrode215 was too high to permit the degree of control over the distributionof thermal energy demonstrated in this example. The high lateralresistivity of lower electrode 215 significantly inhibited both lateraldissipation of thermal energy and lateral current flow. The thermalenergy produced by Joule heating and current flow were effectivelyconfined to the narrow conductive pathway formed during conditioning oflower electrode 215. The behavior within the narrow conductive pathwaywas similar to that of lower electrode 130 in device 100 of Example 1.The concentration of thermal energy to a confined region of lowerelectrode 215 precludes the lateral management of thermal energyafforded by the instant invention and prevents the degree of controlover the relative proportions of crystalline and amorphous phase regionsover the cross-section of the phase-change material needed to achievethe multilevel benefits demonstrated in this example.

While not wishing to be bound by theory, the instant inventors offer thefollowing observations concerning the origin of the programming benefitsachieved with this invention. The observations are intended to aid thepublic in understanding the invention by providing a conceptual orheuristic model of at least some of the phenomena underlying theeffectiveness of pulse width as a programming parameter in the contextof the instant invention. The discussion is intended to illuminate theinvention and is not to be construed as a limitation thereof. Additionalphenomena not described herein may also contribute to the behaviorobserved in the examples described hereinabove.

The flow of electric current through the lower electrode influences thestructure of the phase-change material by establishing a particulardistribution of thermal energy therein. The distribution of thermalenergy in turn dictates the temperature profile within the phase changematerial. Of particular importance in controlling the relativeproportions and spatial arrangement of crystalline and amorphous phaseregions in the phase-change material is control over the localtemperatures within the phase-change material relative to thecrystallization and melting temperatures.

When the width of a programming pulse is increased, additionalelectrical and thermal energy is provided to the lower electrode. Thisadditional energy will dissipate through two primary competing channels.First, the energy can dissipate in the primary direction of current flowand be transferred directly from the lower electrode to the phase-changematerial. This channel may be referred to herein as a longitudinalchannel of energy dissipation. Second, the energy can dissipate lateralto the primary direction of current flow and be transferred radiallywithin the lower electrode before being transferred to the phase-changematerial. This channel may be referred to herein as a lateral channel ofenergy dissipation.

In broad terms, the temperature profile established within thephase-change material is controlled by the competition between thelongitudinal and lateral dissipation channels. When the lateralresistivity of the lower electrode is high, the longitudinal channeldominates and most of the additional energy supplied by an increasedpulse width is transferred directly to the phase-change material withoutappreciable lateral transport. In this situation, as occurs in Example 2hereinabove, the effective area of contact of the lower electrode withthe phase-change material is controlled by the cross-section of thelongitudinal channel of thermal and electrical energy transport. Aspulse width increases, additional energy is delivered through thelongitudinal channel, but the high lateral resistivity precludes anexpansion of the effective area of energy transport from the lowerelectrode to the phase-change material. As a result, the distribution ofthermal energy within phase-change material is governed primarily by thecharacteristics (such as thermal conductivity, resistivity, heatcapacity) of the phase-change material. The lower electrode is inessence a passive element that provides no meaningful mechanism forinfluencing the temperature profile within the phase-change material.

As the lateral resistivity of the lower electrode decreases, the lateralchannel of thermal and electrical energy transport becomes moreimportant and new opportunities for using pulse width to control thetemperature profile within the phase-change material arise. Theavailability of a viable lateral channel, in conjunction with pulsewidth modulation, enables the lower electrode to assume a more activerole in controlling the distribution of thermal and electrical energytransferred to the phase-change material. As indicated above, when nolateral channel of energy dissipation is available, the added energyaccompanying an increased pulse width is delivered directly to thephase-change material and the distribution of thermal energy within thephase-change material is dominated by processes within the phase-changematerial. In this situation, the area over which energy is transferredfrom the lower electrode to the phase-change material is fixed and therate of transfer of energy is limited by processes internal to thephase-change material. The excess energy accompanying longer pulsesaccumulates and remains stored in the lower electrode for so long as ittakes for energy to redistribute itself through internal processesoccurring within the phase-change material.

If a lateral channel of dissipation is present, however, the excessenergy supplied by longer pulses may be redistributed laterally withinthe lower electrode before transferring to the phase-change material.The overall result is a spreading or lateral transport of the electricalcurrent and its accompanying thermal energy over a larger effective areabefore transfer to the phase-change material occurs. The opportunity forusing pulse width to control the temperature profile within thephase-change material arises because the extent to which lateralspreading occurs is a function of pulse width. The extent of lateraldissipation depends on the relative rates of longitudinal and lateralenergy transport. At short pulse widths, the relative rates arecontrolled by the intrinsic characteristics of the lower electrode. Asthe pulse width increases and more energy accumulates at the interfacewith the phase-change material, however, the capacity of thephase-change material to receive the energy becomes increasinglyimportant and may inhibit the longitudinal channel of energy transport.

One factor contributing to the inhibition is the heating of thephase-change material at the point of transfer of electrical energy tothe phase-change material. As the temperature of the phase-changematerial increases and becomes more similar to the temperature of thelower electrode, the driving force (temperature gradient) for thermaltransfer from the lower electrode to the phase-change materialdecreases. Since the thermal conductivity of the lower electrode ishigher than the thermal conductivity of the phase-change material,lateral thermal transfer within the lower electrode becomes increasinglymore important as the pulse width increases. The net result is thatlonger pulses lead to greater penetration of thermal energy in lateraldirections and the degree of lateral penetration can be systematicallycontrolled using pulse width as a programming parameter.

Lateral control over the distribution of electric current and thermalenergy in the lower electrode provides a degree of freedom forcontrolling the temperature profile within the phase-change material. Bycontrolling the lateral dissipation of electrical and thermal energy,the temperature profile of the lower electrode at the interface with thephase-change material can be controlled. The lateral area, for example,over which the lower electrode is heated to a temperature of at leastthe melting temperature can be controlled and such control influencesthe extent to which amorphous phase regions form in the phase-changematerial. Similarly, control over the lateral area of the lowerelectrode over which the temperature is maintained between thecrystallization and melting temperatures influences the extent to whichcrystallization occurs in the phase-change material.

If lateral dissipation is too efficient at a particular current level,pulse width becomes a less effective programming variable forcontrolling the temperature profile within the phase-change material.This is because it becomes more difficult to use pulse width as a meansto establish a temperature profile in the lower electrode in which aspatial differentiation of regions having temperatures below thecrystallization temperature, between the crystallization temperature andmelting temperature, and above the melting temperature occur within thecross-sectional dimension of the interface of the lower electrode withthe phase-change material. Efficient lateral dissipation has a tendencyto homogenize the temperature profile of the lower electrode and as thetemperature profile becomes more uniform over the length scale of theinterfacial area of contact to the phase-change material, it becomesmore difficult to differentially program different portions of thephase-change material. Instead, as in Example 1, the application ofelectrical pulses tends to produce more spatially uniform structuraltransformations of the phase-change material.

If lateral dissipation is not efficient enough at a particular currentlevel, pulse width also becomes a less effective programming variablefor controlling the temperature profile within the phase-changematerial. As discussed in Example 2 hereinabove, high lateral resistanceconfines the energy associated with a programming pulse and preventsdissipation of the (electrical or thermal) energy of the pulse inlateral directions. As a result, the lateral area over which the energyof the pulse extends is controlled by the electrode material andrelatively insensitive to pulse width.

The resistivity of the lower electrode governs the efficiency of lateraldissipation of electrical and thermal energy. (More accurately, thelateral resistivity is the governing factor. Since most electrodematerials are isotropic, however, the resistivity is uniform in alldirections.) The examples presented hereinabove indicate that theefficiency of lateral dissipation needed to achieve the controlledprogramming benefits of the instant invention occurs over an optimalrange. If the efficiency of lateral dissipation is too high or too low,pulse width becomes a less effective programming variable forsystematically and incrementally controlling the structural state of thephase-change material as is desired for multilevel operation. In oneembodiment, an effective degree of lateral dissipation occurs when theresistivity of the lower electrode is between 1 mΩ-cm and 100 mΩ-cm. Inanother embodiment, the resistivity of the lower electrode is between 1mΩ-cm and 20 mΩ-cm. In still another embodiment, the resistivity of thelower electrode is between 2 mΩ-cm and 10 mΩ-cm. In a furtherembodiment, the resistivity of the lower electrode is between 3 mΩ-cmand 7 mΩ-cm.

The chalcogenide materials generally include one or more elements fromcolumn VI of the periodic table (the chalcogen elements) and optionallyone or more chemical modifiers from columns III, IV or V. One or more ofS, Se, and Te are the most common chalcogen elements included in achalcogenide phase-change material. The chalcogen elements arecharacterized by divalent bonding and the presence of lone pairelectrons. The divalent bonding leads to the formation of chain and ringstructures upon combining chalcogen elements to form chalcogenidematerials and the lone pair electrons provide a source of electrons forforming a conducting filament. Suitable modifiers include one or more oftrivalent and tetravalent modifying elements such as As, Ge, Ga, Si, Sn,Pb, Al, Sb, In, and Bi. Transition metals such as Cu, Ni, Zn, Ag, and Cdmay also be used as modifiers. A preferred chalcogenide compositionincludes one or more chalcogenide elements along with one or moretrivalent or tetravalent modifiers and/or one or more transition metalmodifiers. Materials that include Ge, Sb, and/or Te, such as Ge₂Sb₂Te₅,are examples of chalcogenide materials in accordance with the instantinvention. Other examples of phase-change materials include, but are notlimited to, GaSb, InSb, InSe, Sb₂Te₃, GeTe, and other ternary Ge—Sb—Tecompositions, In₂Sb₂Te₅ and other ternary In—Sb—Te compositions, ternaryGaSeTe compositions, TAG and other ternary Te—As—Ge compositions,GaSeTe, SnSb₂Tc₄, quaternary Ag—In—Sb—Te compositions, quaternaryGe—Sn—Sb—Te compositions, quaternary Ge—Sb—Se—Te compositions, andTe₈₁Ge₁₅Sb₂S₂ and other quaternary Te—Ge—Sb—S compositions.

Chalcogenide phase-change materials have been discussed in U.S. Pat.Nos. 5,166,758; 5,296,716; 5,534,711; 5,536,947; 5,543,737; 5,596,522;5,694,146; 5,757,446; and 6,087,674; the disclosures of which are herebyincorporated by reference.

The present invention has been particularly shown and described withreference to the foregoing embodiments, which are merely illustrative ofthe best modes for carrying out the invention. It should be understoodby those skilled in the art that various alternatives to the embodimentsof the invention described herein may be employed in practicing theinvention without departing from the spirit and scope of the inventionas defined in the following claims. The embodiments should be understoodto include all novel and non-obvious combinations of elements describedherein, and claims may be presented in this or a later application toany novel and non-obvious combination of these elements. Moreover, theforegoing embodiments are illustrative, and no single feature or elementis essential to all possible combinations that may be claimed in this ora later application.

With regard to the processes, methods, heuristics, etc. describedherein, it should be understood that although the steps of suchprocesses, etc. have been described as occurring according to a certainordered sequence, such processes could be practiced with the describedsteps performed in an order other than the order described herein. Itfurther should be understood that certain steps could be performedsimultaneously, that other steps could be added, or that certain stepsdescribed herein could be omitted. In other words, the descriptions ofprocesses described herein are provided for illustrating certainembodiments and should in no way be construed to limit the claimedinvention.

Accordingly, it is to be understood that the above description isintended to be illustrative and not restrictive. Many embodiments andapplications other than the examples provided would be apparent to thoseof skill in the art upon reading the above description. The scope of theinvention should be determined, not with reference to the abovedescription, but should instead be determined with reference to theappended claims, along with the full scope of equivalents to which suchclaims are entitled. It is anticipated and intended that futuredevelopments will occur in the arts discussed herein, and that thedisclosed systems and methods will be incorporated into such futureembodiments. In sum, it should be understood that the invention iscapable of modification and variation and is limited only by thefollowing claims.

All terms used in the claims are intended to be given their broadestreasonable constructions and their ordinary meanings as understood bythose skilled in the art unless an explicit indication to the contraryis made herein. In particular, use of the singular articles such as “a,”“the,” “said,” etc. should be read to recite one or more of theindicated elements unless a claim recites an explicit limitation to thecontrary.

1. A method of programming an electronic device comprising: providing afirst electrode; providing a phase-change material in electricalcommunication with said first electrode, said phase-change materialhaving a plurality of programming states, said programming statesincluding a set state with a set resistance, a reset state with a resetresistance, and one or more intermediate states with a resistancebetween said set resistance and said reset resistance; providing asecond electrode in electrical communication with said phase-changematerial; applying a first electrical pulse between said first electrodeand said second electrode, said first electrical pulse having a firstamplitude and a first duration, said first electrical pulse transformingsaid phase-change material to a first programming state; and applying asecond electrical pulse between said first electrode and said secondelectrode, said second electrical pulse having a second amplitude and asecond duration, said second duration differing from said firstduration, said second electrical pulse transforming said phase-changematerial to a second programming state; wherein said first programmingstate or said second programming state is one of said intermediatestates.
 2. The method of claim 1, wherein said first electrode comprisesan annealed conductive material.
 3. The method of claim 2, wherein saidfirst electrode comprises nitrogen.
 4. The method of claim 3, whereinsaid first electrode further comprises a metal or silicon.
 5. The methodof claim 2, wherein said second electrode comprises an annealedconductive material.
 6. The method of claim 1, wherein said firstelectrode comprises a material selected from the group consisting ofTiAlN, TiSiN, TiW, TiN, MoN, and nitrogenated carbon.
 7. The method ofclaim 1, wherein the resistivity of said first electrode is between 1mΩ-cm and 100 mΩ-cm.
 8. The method of claim 1, wherein the resistivityof said first electrode is between 1 mΩ-cm and 20 mΩ-cm.
 9. The methodof claim 1, wherein the resistivity of said first electrode is between 2mΩ-cm and 10 mΩ-cm.
 10. The method of claim 1, wherein the resistivityof said first electrode is between 3 mΩ-cm and 7 mΩ-cm.
 11. The methodof claim 1, wherein said phase-change material comprises a chalcogenelement.
 12. The method of claim 11, wherein said phase-change materialfurther comprises Ge, In, or Sb.
 13. The method of claim 1, wherein saidfirst amplitude equals said second amplitude.
 14. The method of claim 1,wherein said first programming state or said second programming state issaid set state.
 15. The method of claim 1, wherein said firstprogramming state or said second programming state is said reset state.16. The method of claim 1, wherein said first programming state is afirst intermediate state and said second programming state is a secondintermediate state.
 17. The method of claim 1, wherein said phase-changematerial comprises amorphous regions and crystalline regions, said firstprogramming state having a first volume fraction of said amorphousregions, said second programming state having a second volume fractionof said amorphous region.
 18. The method of claim 1, wherein said firstelectrical pulse produces a first temperature profile at the interfaceof said first electrode and said phase-change material and said secondelectrical pulse produces a second temperature profile at the interfaceof said first electrode and said phase-change material.
 19. The methodof claim 18, wherein said first temperature profile includes a firstarea over which the temperature of said phase-change material at saidinterface is greater than or equal to the crystallization temperature ofsaid phase-change material and said second temperature profile includesa second area over which the temperature of said phase-change materialat said interface is greater than or equal to the crystallizationtemperature of said phase-change material, said second area differingfrom said first area.
 20. The method of claim 19, wherein said firsttemperature profile further includes a third area over which thetemperature of said phase-change material at said interface is greaterthan or equal to the melting temperature of said phase-change materialand said second temperature profile includes a fourth area over whichthe temperature of said phase-change material at said interface isgreater than or equal to the melting temperature of said phase-changematerial, said fourth area differing from said third area.